Binary addition follows the same positional logic as denary addition, but because the base is 2, a 'carry' is generated whenever the sum of a column reaches or exceeds 2. This is analogous to carrying a 1 to the tens column in denary when a sum reaches 10.
There are four fundamental rules for adding two bits: , , , and with a carry of 1 to the next column. When three bits are added (including a carry from a previous column), the rule is with a carry of 1.
The process always begins at the LSB and moves toward the MSB, ensuring that any carried values are correctly integrated into the higher-order positional weights.
In modern computing, subtraction is rarely performed as a distinct operation; instead, it is treated as the addition of a negative number. This allows the CPU to use a single 'adder' circuit for both addition and subtraction, simplifying hardware design.
To subtract a number (the subtrahend) from another (the minuend), the subtrahend is first converted into its Two's Complement representation. This involves inverting all bits (One's Complement) and then adding 1 to the result.
Once the subtrahend is converted to its negative equivalent, it is added to the minuend using standard binary addition rules. Any final carry-out bit beyond the fixed bit-width is typically ignored in Two's Complement arithmetic.
| Feature | One's Complement | Two's Complement |
|---|---|---|
| Method | Invert all bits (0 to 1, 1 to 0) | Invert all bits and add 1 |
| Zero Representation | Two versions: +0 and -0 | Unique representation for 0 |
| Arithmetic | Requires 'end-around carry' | Standard addition works for subtraction |
| Range (8-bit) | to | to |
Two's Complement is the industry standard because it eliminates the logical ambiguity of having two representations for zero. It also ensures that the MSB consistently acts as a sign bit (0 for positive, 1 for negative).
Overflow occurs when the result of an arithmetic operation exceeds the maximum value that can be represented within the allocated number of bits. In an 8-bit unsigned system, this happens if the sum is greater than 255.
In signed arithmetic, overflow is detected when the addition of two numbers with the same sign produces a result with the opposite sign. For example, adding two positive numbers and getting a negative result (MSB = 1) indicates an overflow error.
Overflow is critical because it leads to incorrect data processing. Computers handle this by setting an 'overflow flag' in the status register, which software can then check to handle the error.
Always show carry bits: When performing addition in an exam, write the carry bits clearly above the next column to demonstrate your methodology and avoid simple calculation errors.
Verify with Denary: To ensure your binary result is correct, convert the initial binary numbers to denary, perform the operation in denary, and then convert your binary answer back to denary to see if they match.
Check the Bit-Width: If a question specifies an 8-bit result, ensure your final answer has exactly 8 bits. If your sum has 9 bits, identify the 9th bit as an overflow bit.
Two's Complement Shortcut: To find the Two's Complement quickly, start from the right and keep all bits the same up to and including the first '1', then flip all remaining bits to the left.
