What is the primary difference between an interrupt and polling?

In polling, the CPU actively and repeatedly checks a device's status to see if it needs attention, which wastes cycles. In an interrupt-driven system, the device signals the CPU only when it is ready, allowing the CPU to perform other work in the meantime.

How does the CPU handle a higher-priority interrupt that occurs during the execution of a lower-priority ISR?

The CPU uses nesting; it suspends the current lower-priority ISR, saves its registers to the stack, and immediately begins executing the higher-priority ISR. Once the higher-priority task is finished, it returns to complete the lower-priority ISR.

What is the difference between a hardware interrupt and a software interrupt?

Hardware interrupts are triggered by external devices like a keyboard or disk drive and are usually asynchronous. Software interrupts are triggered by the program itself, often to request a service from the Operating System kernel.

What would happen if the CPU did not save the Program Counter (PC) before executing an ISR?

The CPU would lose the return address of the original program. After the ISR finished, the processor would have no way of knowing which instruction to execute next, effectively causing the program to lose its place and crash.

Why is it a mistake to write a very long and complex Interrupt Service Routine (ISR)?

Long ISRs keep the CPU away from the main program for too long, which can lead to system lag. Furthermore, while one ISR is running, other interrupts of the same or lower priority might be ignored or delayed, potentially causing data loss.

What error occurs if the CPU services an interrupt before finishing the current Fetch-Execute cycle?

Servicing an interrupt mid-instruction could leave the CPU in an inconsistent state, where an instruction is only half-performed. This would lead to data corruption or unpredictable behavior when the program resumes.

Define the term 'Interrupt Service Routine' (ISR).

An ISR is a specific block of code or function that the CPU executes in response to a particular interrupt signal. Each type of interrupt has a corresponding ISR that handles the specific needs of that event.

What is an Interrupt Request (IRQ)?

An IRQ is the actual signal sent to the processor (often via an interrupt controller) to request that the current task be suspended in favor of an interrupt handler.

What is the 'Interrupt Vector Table'?

It is a memory structure that stores the addresses of various Interrupt Service Routines. The CPU uses the interrupt type as an index to find the correct ISR address to load into the Program Counter.

Why are interrupts considered 'asynchronous'?

They are asynchronous because they are triggered by external events that are not synchronized with the CPU's internal clock or the sequence of the program being executed. They can happen at any moment.

Interrupts | Cambridge International Examinations AS-Level Computer Science

Revision Notes

AS-Level

Cambridge International Examinations

Computer Science

4. Processor Fundamentals

Interrupts

Summary

Interrupts are a fundamental mechanism in computer architecture that allow a CPU to handle asynchronous events, manage multitasking, and respond to time-critical hardware signals. By temporarily suspending the current program execution to run a specific service routine, the system ensures that urgent tasks are addressed without requiring the CPU to constantly check the status of every peripheral device.

1. Definition & Core Concepts

An Interrupt is a signal sent to the processor by hardware or software indicating an event that requires immediate attention. When an interrupt is received, the CPU suspends its current activities, saves its state, and executes a specific function to handle the event.

The primary purpose of interrupts is to improve system efficiency by allowing the CPU to perform other tasks while waiting for slower I/O operations or external events. This eliminates the need for polling, where the CPU would waste cycles repeatedly checking if a device is ready.

Interrupts are essential for multitasking, as they allow the operating system to switch between different applications by triggering timer interrupts that signal when a time slice has ended.

Flowchart showing the transition from a main program to an Interrupt Service Routine and the subsequent return to the original task.

2. Types of Interrupts

Hardware Interrupts: These are generated by external physical devices such as keyboards (key presses), mice (movement), or disk drives (data transfer completion). They are asynchronous, meaning they can occur at any time regardless of what the CPU is currently executing.
Software Interrupts: These are triggered by programs currently running on the CPU, often to request services from the operating system, such as opening a file or outputting data to a screen.
Trap Interrupts (Exceptions): These are internal interrupts caused by error conditions or specific instructions within a program, such as a division-by-zero error or an invalid memory access. They are used for debugging and system stability.

3. The Interrupt Handling Process

4. Interrupt Service Routines (ISR)

An ISR is a specialized software routine designed to handle a specific interrupt type. For example, a keyboard ISR is responsible for reading the scan code of a pressed key and placing it into a buffer.

Efficiency is critical for ISRs; they must be as concise as possible to minimize the time the main program is suspended. If an ISR takes too long, it may cause the system to become unresponsive or miss subsequent high-priority interrupts.

Every unique interrupt source has its own ISR, ensuring that the system responds appropriately to different events, whether it is a critical hardware failure or a simple user input.

5. Priority and Nesting

6. Exam Strategy & Tips

Interrupts

Summary

1. Definition & Core Concepts

Interrupts are essential for multitasking, as they allow the operating system to switch between different applications by triggering timer interrupts that signal when a time slice has ended.

Flowchart showing the transition from a main program to an Interrupt Service Routine and the subsequent return to the original task.

2. Types of Interrupts

Hardware Interrupts: These are generated by external physical devices such as keyboards (key presses), mice (movement), or disk drives (data transfer completion). They are asynchronous, meaning they can occur at any time regardless of what the CPU is currently executing.
Software Interrupts: These are triggered by programs currently running on the CPU, often to request services from the operating system, such as opening a file or outputting data to a screen.
Trap Interrupts (Exceptions): These are internal interrupts caused by error conditions or specific instructions within a program, such as a division-by-zero error or an invalid memory access. They are used for debugging and system stability.

3. The Interrupt Handling Process

Interrupt Request (IRQ): A device or software sends a signal to the interrupt controller, which then alerts the CPU that an event requires attention.
Finish Current Cycle: The CPU does not stop instantly; it completes the current Fetch-Execute cycle for the instruction it is currently processing to ensure data integrity.
Save State: The current contents of the processor registers, including the Program Counter (PC) and Status Register (SR), are pushed onto a system stack. This allows the CPU to remember exactly where it was and what it was doing.
ISR Lookup & Execution: The CPU identifies the type of interrupt and looks up the address of the corresponding Interrupt Service Routine (ISR) in an interrupt vector table. It then loads this address into the PC and executes the routine.
Restore & Resume: Once the ISR is complete, the saved register values are popped from the stack back into the CPU. The processor then resumes the original task from the exact point it was interrupted.

4. Interrupt Service Routines (ISR)

Every unique interrupt source has its own ISR, ensuring that the system responds appropriately to different events, whether it is a critical hardware failure or a simple user input.

5. Priority and Nesting

Interrupt Prioritization is the mechanism used to decide which interrupt to handle first when multiple requests occur simultaneously. Critical events, like power failure warnings, are assigned higher priority than routine events like mouse movements.

Nesting occurs when a higher-priority interrupt arrives while the CPU is already executing an ISR for a lower-priority interrupt. In this case, the current ISR is suspended, its state is saved to the stack, and the higher-priority ISR is executed immediately.

Proper management of nested interrupts prevents system conflicts and ensures that the most time-sensitive tasks are always processed with the lowest possible latency.

6. Exam Strategy & Tips

The 'Finish Cycle' Rule: Always remember that the CPU completes the current instruction before handling an interrupt. Examiners often test whether you know that interrupts are checked at the end of the Fetch-Execute cycle.
State Preservation: Be prepared to explain why the stack is used. Without saving the registers, the CPU would lose the context of the original program, leading to a system crash upon return.
Comparison Table: Use the following table to distinguish between key concepts during revision:

Concept	Source	Timing
Hardware Interrupt	External Peripherals	Asynchronous
Software Interrupt	Running Applications	Synchronous/Requested
Trap/Exception	CPU Internal Errors	Synchronous/Error-based