| Component | Primary Function | Stage Involved |
|---|---|---|
| PC | Tracks next instruction address | Fetch |
| MAR | Holds current target address | Fetch |
| MDR | Holds actual instruction/data | Fetch |
| CU | Interprets instruction logic | Decode |
| ALU | Performs math/logic | Execute |
Trace the Registers: When asked to describe the cycle, always mention the specific movement of data between registers (e.g., PC MAR RAM MDR).
The PC Increment: Remember that the Program Counter increments during the fetch stage, not at the very end of the cycle. This ensures the CPU is ready for the next cycle even if the current execution takes multiple steps.
Bus Identification: Always specify which bus is being used. Addresses travel on the Address Bus, while instructions and data travel on the Data Bus.
Confusing MAR and MDR: Students often swap these. Remember: Address (MAR) is the map coordinate; Data (MDR) is the treasure found at that coordinate.
Execution is not just Math: While the ALU is vital, the 'Execute' stage also includes simple data movements or branching (changing the PC), not just arithmetic.
Clock Speed Misinterpretation: A higher clock speed ( GHz vs GHz) means more cycles per second, but it does not necessarily mean the computer is 'faster' if other factors like cache or cores are inferior.